In recent years, multilayer ceramic substrates including three-dimensionally arranged conductive leads have been widely used in applications for, for example, modules including electronic components such as semiconductor devices.
Patent Document 1 discloses a multilayer ceramic substrate including a laminated structure that includes an inner layer portion and surface layer portions that sandwich the inner layer portion in the laminating direction, letting the thermal expansion coefficient of the surface layer portions be α1 [ppmK−1] and letting the thermal expansion coefficient of the inner layer portion be α2 [ppmK−1], 0.3≤α2−α1≤1.5, and the, inner layer portion including needle crystals deposited therein. Patent Document 2 discloses a multilayer ceramic substrate having a laminated structure including surface layer portions and an inner layer portion, in which thermal expansion coefficients of the surface layer portions are lower than a thermal expansion coefficient of the inner layer portion, the difference in the, thermal expansion coefficients between the surface layer portions and the inner layer portion is 1.0 ppmK−1 or more, and the content of a component common to both a material contained in the surface layer portions and a material contained in the inner layer portion is 75% by weight or more.
Each of Patent Documents 1 and 2 that disclose the multilayer ceramic substrates says that the use of the surface layer portions each having a lower thermal expansion coefficient than the inner layer portion generates compressive stress in both outermost layers in a cooling process after firing to improve the flexural strength of the multilayer ceramic substrate.
Patent Document 1: Japanese Unexamined Patent Application Publication No. 2007-73728
Patent Document 2: International Publication No. 2007/142112